Key result
Latched comparator with dynamic offset cancellation and latch load reduces power consumption and offset voltage.
A proposed latched comparator using dynamic offset cancellation and a latch load reduces power consumption and offset voltage in simulations.
Simulation results suggest utility in low-power cardiac electronics; leaves open fabricated prototypes and in vivo validation.
A low-power and low-offset latched comparator using dynamic offset cancellation and a latch load is proposed. A latch load at the first stage provides the second stage with a large conversion gain and large trigger voltage. It reduces the power consumption and offset voltage of the comparator. The effectiveness of the proposed structure was verified by SPECTRE simulations.
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Jung et al. (2011) studied this question. A latched comparator using dynamic offset cancellation and a latch load reduces power consumption and offset voltage while providing large conversion gain and trigger voltage.
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